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Searched refs:CLK_TOP_PWM (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dmt8516-clk.h86 #define CLK_TOP_PWM 54 macro
H A Dmt8186-clk.h47 #define CLK_TOP_PWM 28 macro
H A Dmt6779-clk.h130 #define CLK_TOP_PWM 120 macro
H A Dmediatek,mt8188-clk.h64 #define CLK_TOP_PWM 53 macro
H A Dmt8195-clk.h78 #define CLK_TOP_PWM 66 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt8186-topckgen.c580 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM, "top_pwm",
H A Dclk-mt8516.c557 GATE_TOP1(CLK_TOP_PWM, "pwm", "ahb_infra_sel", 9),
H A Dclk-mt8167.c766 GATE_TOP1(CLK_TOP_PWM, "pwm", "ahb_infra_sel", 9),
H A Dclk-mt8188-topckgen.c1082 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM, "top_pwm",
H A Dclk-mt8195-topckgen.c1025 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM, "top_pwm",
H A Dclk-mt6779.c772 MUX_GATE_CLR_SET_UPD(CLK_TOP_PWM, "pwm_sel", pwm_parents,
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt8516.dtsi455 clocks = <&topckgen CLK_TOP_PWM>,