Searched refs:CLK_TOP_CCI400_SEL (Results 1 – 7 of 7) sorted by relevance
| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | mediatek,mt6795-clk.h | 115 #define CLK_TOP_CCI400_SEL 104 macro
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| H A D | mt8173-clk.h | 118 #define CLK_TOP_CCI400_SEL 108 macro
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| H A D | mt2712-clk.h | 155 #define CLK_TOP_CCI400_SEL 124 macro
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| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt6795-topckgen.c | 492 TOP_MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents,
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| H A D | clk-mt8173-topckgen.c | 580 MUX_GATE_FLAGS(CLK_TOP_CCI400_SEL, "cci400_sel",
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| H A D | clk-mt2712.c | 685 MUX_GATE(CLK_TOP_CCI400_SEL, "cci400_sel", cci400_parents, 0x0a0, 16, 3, 23),
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| /openbmc/linux/arch/arm64/boot/dts/mediatek/ |
| H A D | mt8173.dtsi | 1398 <&topckgen CLK_TOP_CCI400_SEL>,
1413 <&topckgen CLK_TOP_CCI400_SEL>,
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