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Searched refs:CLK_SOURCE_CSITE (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/drivers/clk/tegra/
H A Dclk-tegra20.c99 #define CLK_SOURCE_CSITE 0x1d4 macro
938 readl(clk_base + CLK_SOURCE_CSITE); in tegra20_cpu_clock_suspend()
939 writel(3<<30, clk_base + CLK_SOURCE_CSITE); in tegra20_cpu_clock_suspend()
995 clk_base + CLK_SOURCE_CSITE); in tegra20_cpu_clock_resume()
H A Dclk-tegra114.c105 #define CLK_SOURCE_CSITE 0x1d4 macro
1095 readl(clk_base + CLK_SOURCE_CSITE); in tegra114_cpu_clock_suspend()
1096 writel(3 << 30, clk_base + CLK_SOURCE_CSITE); in tegra114_cpu_clock_suspend()
1107 clk_base + CLK_SOURCE_CSITE); in tegra114_cpu_clock_resume()
H A Dclk-tegra124.c28 #define CLK_SOURCE_CSITE 0x1d4 macro
1255 readl(clk_base + CLK_SOURCE_CSITE); in tegra124_cpu_clock_suspend()
1256 writel(3 << 30, clk_base + CLK_SOURCE_CSITE); in tegra124_cpu_clock_suspend()
1267 clk_base + CLK_SOURCE_CSITE); in tegra124_cpu_clock_resume()
H A Dclk-tegra-periph.c51 #define CLK_SOURCE_CSITE 0x1d4 macro
728 …MUX_FLAGS("csite", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_CSITE, 73, TEGRA_PERIPH_ON_APB, tegra_clk_c…
729 …MUX_FLAGS("csite", mux_pllp_pllre_clkm, CLK_SOURCE_CSITE, 73, TEGRA_PERIPH_ON_APB, tegra_clk_csite…
H A Dclk-tegra210.c33 #define CLK_SOURCE_CSITE 0x1d4 macro
3515 readl(clk_base + CLK_SOURCE_CSITE); in tegra210_cpu_clock_suspend()
3516 writel(3 << 30, clk_base + CLK_SOURCE_CSITE); in tegra210_cpu_clock_suspend()
3522 clk_base + CLK_SOURCE_CSITE); in tegra210_cpu_clock_resume()