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Searched refs:CLK_PERI_UART1_PD (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7629-clk.h146 #define CLK_PERI_UART1_PD 12 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dmt7629-clk.h142 #define CLK_PERI_UART1_PD 12 macro
H A Dmt7622-clk.h150 #define CLK_PERI_UART1_PD 14 macro
/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt7622.c364 GATE_PERI0(CLK_PERI_UART1_PD, "peri_uart1_pd", "axi_sel", 18),
H A Dclk-mt7629.c441 GATE_PERI0(CLK_PERI_UART1_PD, "peri_uart1_pd", "faxi", 18),
/openbmc/u-boot/arch/arm/dts/
H A Dmt7629.dtsi198 <&pericfg CLK_PERI_UART1_PD>;
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7629.c482 GATE_PERI0(CLK_PERI_UART1_PD, CLK_TOP_FAXI, 18),
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt7629.dtsi227 <&pericfg CLK_PERI_UART1_PD>;
/openbmc/linux/arch/arm64/boot/dts/mediatek/
H A Dmt7622.dtsi407 <&pericfg CLK_PERI_UART1_PD>;