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Searched refs:CLK_GOUT_WDT0_PCLK (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dexynos7885.h131 #define CLK_GOUT_WDT0_PCLK 42 macro
H A Dexynos850.h305 #define CLK_GOUT_WDT0_PCLK 33 macro
/openbmc/linux/drivers/clk/samsung/
H A Dclk-exynos7885.c550 GATE(CLK_GOUT_WDT0_PCLK, "gout_wdt0_pclk", "mout_peri_bus_user",
H A Dclk-exynos850.c1625 GATE(CLK_GOUT_WDT0_PCLK, "gout_wdt0_pclk", "mout_peri_bus_user",
/openbmc/linux/arch/arm64/boot/dts/exynos/
H A Dexynos850.dtsi217 clocks = <&cmu_peri CLK_GOUT_WDT0_PCLK>, <&oscclk>;