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Searched refs:CLK_ETHSYS_GP1 (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt2701-eth.c27 GATE_ETH(CLK_ETHSYS_GP1, "gp1_clk", "ethpll_500m_ck", 8),
/openbmc/u-boot/include/dt-bindings/clock/
H A Dmt7623-clk.h402 #define CLK_ETHSYS_GP1 3 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dmt2701-clk.h419 #define CLK_ETHSYS_GP1 4 macro
/openbmc/u-boot/arch/arm/dts/
H A Dmt7623.dtsi263 <&ethsys CLK_ETHSYS_GP1>,
/openbmc/u-boot/drivers/clk/mediatek/
H A Dclk-mt7623.c717 GATE_ETH1(CLK_ETHSYS_GP1, CLK_TOP_ETHPLL_500M, 8),
/openbmc/linux/arch/arm/boot/dts/mediatek/
H A Dmt2701.dtsi735 <&ethsys CLK_ETHSYS_GP1>,
H A Dmt7623.dtsi969 <&ethsys CLK_ETHSYS_GP1>,