Home
last modified time | relevance | path

Searched refs:CLK_BUS_UART5 (Results 1 – 19 of 19) sorted by relevance

/openbmc/linux/drivers/clk/sunxi-ng/
H A Dccu-sun9i-a80.h46 #define CLK_NUMBER (CLK_BUS_UART5 + 1)
H A Dccu-sun50i-h616.c928 [CLK_BUS_UART5] = &bus_uart5_clk.common.hw,
H A Dccu-sun9i-a80.c1106 [CLK_BUS_UART5] = &bus_uart5_clk.common.hw,
H A Dccu-sun8i-r40.c1096 [CLK_BUS_UART5] = &bus_uart5_clk.common.hw,
H A Dccu-sun20i-d1.c1152 [CLK_BUS_UART5] = &bus_uart5_clk.common.hw,
/openbmc/linux/include/dt-bindings/clock/
H A Dsun50i-h616-ccu.h57 #define CLK_BUS_UART5 71 macro
H A Dsun9i-a80-ccu.h160 #define CLK_BUS_UART5 129 macro
H A Dsun8i-r40-ccu.h124 #define CLK_BUS_UART5 101 macro
H A Dsun20i-d1-ccu.h77 #define CLK_BUS_UART5 67 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dsun9i-a80-ccu.h160 #define CLK_BUS_UART5 129 macro
H A Dsun8i-r40-ccu.h120 #define CLK_BUS_UART5 101 macro
/openbmc/u-boot/drivers/clk/sunxi/
H A Dclk_a80.c32 [CLK_BUS_UART5] = GATE(0x594, BIT(21)),
H A Dclk_r40.c39 [CLK_BUS_UART5] = GATE(0x06c, BIT(21)),
/openbmc/u-boot/arch/arm/dts/
H A Dsun8i-r40.dtsi383 clocks = <&ccu CLK_BUS_UART5>;
H A Dsun9i-a80.dtsi1065 clocks = <&ccu CLK_BUS_UART5>;
/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h616.dtsi389 clocks = <&ccu CLK_BUS_UART5>;
/openbmc/linux/arch/riscv/boot/dts/allwinner/
H A Dsunxi-d1s-t113.dtsi304 clocks = <&ccu CLK_BUS_UART5>;
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun9i-a80.dtsi1105 clocks = <&ccu CLK_BUS_UART5>;
H A Dsun8i-r40.dtsi898 clocks = <&ccu CLK_BUS_UART5>;