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Searched refs:CLK_BDP_WR_VDI_PXL (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/clk/mediatek/
H A Dclk-mt2701-bdp.c37 GATE_BDP0(CLK_BDP_WR_VDI_PXL, "wr_vdi_pxl", "hdmi_0_deep340m", 3),
/openbmc/linux/include/dt-bindings/clock/
H A Dmt2701-clk.h435 #define CLK_BDP_WR_VDI_PXL 4 macro