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Searched refs:CHT_PLAT_CLK_3_HZ (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/sound/soc/intel/boards/
H A Dcht_bsw_rt5672.c28 #define CHT_PLAT_CLK_3_HZ 19200000 macro
77 CHT_PLAT_CLK_3_HZ, 48000 * 512); in platform_clock_control()
164 CHT_PLAT_CLK_3_HZ, params_rate(params) * 512); in cht_aif1_hw_params()
253 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ); in cht_codec_init()
H A Dcht_bsw_max98090_ti.c30 #define CHT_PLAT_CLK_3_HZ 19200000 macro
120 CHT_PLAT_CLK_3_HZ, SND_SOC_CLOCK_IN); in cht_aif1_hw_params()
243 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ); in cht_codec_init()
H A Dcht_bsw_rt5645.c30 #define CHT_PLAT_CLK_3_HZ 19200000 macro
216 CHT_PLAT_CLK_3_HZ, params_rate(params) * 512); in cht_aif1_hw_params()
330 ret = clk_set_rate(ctx->mclk, CHT_PLAT_CLK_3_HZ); in cht_codec_init()