Home
last modified time | relevance | path

Searched refs:CC_ENABLE (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/crypto/intel/qat/qat_common/
H A Dicp_qat_hal.h28 CC_ENABLE = 0x01c, enumerator
H A Dqat_hal.c509 qat_hal_wr_ae_csr(handle, ae, CC_ENABLE, INIT_CCENABLE_VALUE); in qat_hal_clr_reset()
673 qat_hal_wr_ae_csr(handle, ae, CC_ENABLE, INIT_CCENABLE_VALUE); in qat_hal_clear_gpr()
1033 savcc = qat_hal_rd_ae_csr(handle, ae, CC_ENABLE); in qat_hal_exec_micro_inst()
1047 qat_hal_wr_ae_csr(handle, ae, CC_ENABLE, savcc & 0xffffdfff); in qat_hal_exec_micro_inst()
1072 qat_hal_wr_ae_csr(handle, ae, CC_ENABLE, savcc); in qat_hal_exec_micro_inst()
/openbmc/linux/drivers/staging/media/deprecated/atmel/
H A Datmel-isc.h83 #define CC_ENABLE BIT(5) macro
H A Datmel-sama7g5-isc.c59 (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \
H A Datmel-sama5d2-isc.c56 (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \
H A Datmel-isc-base.c762 CC_ENABLE; in isc_try_configure_pipeline()
/openbmc/linux/drivers/media/platform/microchip/
H A Dmicrochip-isc.h84 #define CC_ENABLE BIT(5) macro
H A Dmicrochip-sama7g5-isc.c59 (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \
H A Dmicrochip-sama5d2-isc.c56 (WB_ENABLE | CFA_ENABLE | CC_ENABLE | GAM_ENABLES | CSC_ENABLE | \
H A Dmicrochip-isc-base.c796 CC_ENABLE; in isc_try_configure_pipeline()