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Searched refs:BIT18 (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/staging/rtl8723bs/include/
H A Dhal_com_reg.h565 #define RRSR_MCS6 BIT18
697 #define IMR_BCNDOK1 BIT18 /* Beacon Queue DMA OK Interrupt 1 */
744 #define RCR_TIM_PARSER_EN BIT18 /* RX Beacon TIM Parser. */
1288 #define SDIO_HIMR_CPWM1_MSK BIT18
1310 #define SDIO_HISR_CPWM1 BIT18
1379 #define BT_FUNC_EN BIT18 /* BT function enable */
H A Drtl8723b_spec.h226 #define IMR_BCNDOK5_8723B BIT18 /* Beacon Queue DMA OK Interrupt 5 */
H A Dosdep_service.h35 #define BIT18 0x00040000 macro
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/btcoexist/
H A Dhalbt_precomp.h49 #define BIT18 0x00040000 macro
/openbmc/linux/drivers/staging/rtl8192e/
H A Drtl819x_Qos.h28 #define BIT18 0x00040000 macro
/openbmc/linux/drivers/staging/rtl8192e/rtl8192e/
H A Dr8192E_hw.h68 #define RCR_ADF BIT18
/openbmc/linux/include/uapi/linux/
H A Dsynclink.h37 #define BIT18 0x00040000 macro
/openbmc/linux/drivers/scsi/
H A Ddc395x.h58 #define BIT18 0x00040000 macro
/openbmc/linux/drivers/staging/rtl8723bs/hal/
H A DHal8723BReg.h415 #define IMR_BCNDOK5_8723B BIT18 /* Beacon Queue DMA OK Interrupt 5 */
H A Dhal_com.c981 PHY_SetRFReg(padapter, RF_PATH_A, REG_RF_BB_GAIN_OFFSET, BIT18|BIT17|BIT16|BIT15, target); in rtw_bb_rf_gain_offset()
/openbmc/libcper/include/libcper/
H A DCper.h895 #define EFI_PLATFORM_MEMORY_ERROR_EXTENDED_ROW_BIT_16_17_VALID BIT18
971 #define EFI_PLATFORM_MEMORY2_CARD_HANDLE_VALID BIT18
/openbmc/linux/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
H A Dreg.h376 #define RRSR_MCS6 BIT18
/openbmc/linux/drivers/scsi/lpfc/
H A Dlpfc_hw4.h785 #define LPFC_SLI4_INTR18 BIT18