Searched refs:BCM2836_NCORES (Results 1 – 2 of 2) sorted by relevance
23 #define BCM2836_NCORES 4 macro36 uint32_t mailboxes[BCM2836_NCORES * BCM2836_MBPERCORE];40 uint32_t timercontrol[BCM2836_NCORES];41 uint32_t mailboxcontrol[BCM2836_NCORES];45 uint8_t timerirqs[BCM2836_NCORES];53 uint32_t irqsrc[BCM2836_NCORES];54 uint32_t fiqsrc[BCM2836_NCORES];57 qemu_irq irq[BCM2836_NCORES];58 qemu_irq fiq[BCM2836_NCORES];
83 for (i = 0; i < BCM2836_NCORES; i++) { in bcm2836_control_update()89 assert(s->route_gpu_irq < BCM2836_NCORES); in bcm2836_control_update()94 assert(s->route_gpu_fiq < BCM2836_NCORES); in bcm2836_control_update()112 for (i = 0; i < BCM2836_NCORES; i++) { in bcm2836_control_update()134 for (i = 0; i < BCM2836_NCORES; i++) { in bcm2836_control_update()145 assert(core >= 0 && core < BCM2836_NCORES); in bcm2836_control_set_local_irq()249 assert(s->route_gpu_fiq < BCM2836_NCORES in bcm2836_control_read()250 && s->route_gpu_irq < BCM2836_NCORES); in bcm2836_control_read()326 for (i = 0; i < BCM2836_NCORES; i++) { in bcm2836_control_reset()331 for (i = 0; i < BCM2836_NCORES * BCM2836_MBPERCORE; i++) { in bcm2836_control_reset()[all …]