xref: /openbmc/u-boot/include/dt-bindings/reset/ast2600-reset.h (revision fadd65c3aeb29333e0f6707c12a60b5cb218e552)
1  // SPDX-License-Identifier: GPL-2.0+
2  /*
3   * Copyright (C) ASPEED Technology Inc.
4   */
5  
6  #ifndef _MACH_ASPEED_AST2600_RESET_H_
7  #define _MACH_ASPEED_AST2600_RESET_H_
8  
9  #define ASPEED_RESET_FSI		(59)
10  #define ASPEED_RESET_RESERVED58		(58)
11  #define ASPEED_RESET_RESERVED57		(57)
12  #define ASPEED_RESET_SD			(56)
13  #define ASPEED_RESET_ADC		(55)
14  #define ASPEED_RESET_JTAG_MASTER2	(54)
15  #define ASPEED_RESET_MAC4		(53)
16  #define ASPEED_RESET_MAC3		(52)
17  #define ASPEED_RESET_RESERVE51		(51)
18  #define ASPEED_RESET_RESERVE50		(50)
19  #define ASPEED_RESET_RESERVE49		(49)
20  #define ASPEED_RESET_RESERVE48		(48)
21  #define ASPEED_RESET_RESERVE47		(47)
22  #define ASPEED_RESET_RESERVE46		(46)
23  #define ASPEED_RESET_I3C5		(45)
24  #define ASPEED_RESET_I3C4		(44)
25  #define ASPEED_RESET_I3C3		(43)
26  #define ASPEED_RESET_I3C2		(42)
27  #define ASPEED_RESET_I3C1		(41)
28  #define ASPEED_RESET_I3C0		(40)
29  #define ASPEED_RESET_I3C_DMA		(39)
30  #define ASPEED_RESET_RESERVED38		(38)
31  #define ASPEED_RESET_PWM		(37)
32  #define ASPEED_RESET_PECI		(36)
33  #define ASPEED_RESET_MII		(35)
34  #define ASPEED_RESET_I2C		(34)
35  #define ASPEED_RESET_RESERVED33		(33)
36  #define ASPEED_RESET_LPC_ESPI		(32)
37  #define ASPEED_RESET_H2X		(31)
38  #define ASPEED_RESET_GP_MCU		(30)
39  #define ASPEED_RESET_DP_MCU		(29)
40  #define ASPEED_RESET_DP			(28)
41  #define ASPEED_RESET_RC_XDMA		(27)
42  #define ASPEED_RESET_GRAPHICS		(26)
43  #define ASPEED_RESET_DEV_XDMA		(25)
44  #define ASPEED_RESET_DEV_MCTP		(24)
45  #define ASPEED_RESET_RC_MCTP		(23)
46  #define ASPEED_RESET_JTAG_MASTER	(22)
47  #define ASPEED_RESET_PCIE_DEV_OE	(21)
48  #define ASPEED_RESET_PCIE_DEV_O		(20)
49  #define ASPEED_RESET_PCIE_RC_OE		(19)
50  #define ASPEED_RESET_PCIE_RC_O		(18)
51  #define ASPEED_RESET_RESERVED17		(17)
52  #define ASPEED_RESET_EMMC		(16)
53  #define ASPEED_RESET_UHCI		(15)
54  #define ASPEED_RESET_EHCI_P1		(14)
55  #define ASPEED_RESET_CRT		(13)
56  #define ASPEED_RESET_MAC2		(12)
57  #define ASPEED_RESET_MAC1		(11)
58  #define ASPEED_RESET_RESERVED10		(10)
59  #define ASPEED_RESET_RVAS		(9)
60  #define ASPEED_RESET_PCI_VGA		(8)
61  #define ASPEED_RESET_2D			(7)
62  #define ASPEED_RESET_VIDEO		(6)
63  #define ASPEED_RESET_PCI_DP		(5)
64  #define ASPEED_RESET_HACE		(4)
65  #define ASPEED_RESET_EHCI_P2		(3)
66  #define ASPEED_RESET_RESERVED2		(2)
67  #define ASPEED_RESET_AHB		(1)
68  #define ASPEED_RESET_SDRAM		(0)
69  
70  #endif  /* _MACH_ASPEED_AST2600_RESET_H_ */
71