Home
last modified time | relevance | path

Searched refs:ARM_MMU_IDX_NOTLB (Results 1 – 1 of 1) sorted by relevance

/openbmc/qemu/target/arm/
H A Dcpu.h2880 #define ARM_MMU_IDX_NOTLB 0x20 /* does not have a TLB */ macro
2889 (ARM_MMU_IDX_A | ARM_MMU_IDX_M | ARM_MMU_IDX_NOTLB)
2926 ARMMMUIdx_Stage1_E0 = 0 | ARM_MMU_IDX_NOTLB,
2927 ARMMMUIdx_Stage1_E1 = 1 | ARM_MMU_IDX_NOTLB,
2928 ARMMMUIdx_Stage1_E1_PAN = 2 | ARM_MMU_IDX_NOTLB,