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Searched refs:ARM_CP_NOP (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/target/arm/tcg/
H A Dcpu32.c401 .access = PL1_W, .resetvalue = 0, .type = ARM_CP_NOP },
403 .access = PL1_W, .resetvalue = 0, .type = ARM_CP_NOP },
582 .opc2 = 0, .access = PL1_W, .type = ARM_CP_NOP },
701 .access = PL1_W, .type = ARM_CP_NOP, .resetvalue = 0 },
704 .access = PL1_W, .type = ARM_CP_NOP, .resetvalue = 0 },
707 .access = PL1_W, .type = ARM_CP_NOP, .resetvalue = 0 },
710 .access = PL1_W, .type = ARM_CP_NOP, .resetvalue = 0 },
713 .access = PL1_W, .type = ARM_CP_NOP, .resetvalue = 0 },
716 .access = PL1_W, .type = ARM_CP_NOP, .resetvalue = 0 },
H A Dtranslate.c3089 case ARM_CP_NOP: in do_coproc_insn()
H A Dtranslate-a64.c2458 case ARM_CP_NOP: in handle_sys()
/openbmc/qemu/target/arm/
H A Dhelper.c683 .opc1 = CP_ANY, .opc2 = CP_ANY, .access = PL1_RW, .type = ARM_CP_NOP },
685 .opc1 = CP_ANY, .opc2 = CP_ANY, .access = PL1_RW, .type = ARM_CP_NOP },
687 .opc1 = CP_ANY, .opc2 = CP_ANY, .access = PL1_RW, .type = ARM_CP_NOP },
689 .opc1 = CP_ANY, .opc2 = CP_ANY, .access = PL1_RW, .type = ARM_CP_NOP },
693 .type = ARM_CP_NOP | ARM_CP_OVERRIDE },
752 .opc1 = 0, .opc2 = 0, .access = PL1_RW, .type = ARM_CP_NOP },
754 .opc1 = 0, .opc2 = 1, .access = PL1_RW, .type = ARM_CP_NOP },
865 .access = PL1_W, .type = ARM_CP_NOP },
874 .access = PL0_W, .type = ARM_CP_NOP },
876 .access = PL0_W, .type = ARM_CP_NOP },
[all …]
H A Ddebug_helper.c1039 .type = ARM_CP_NOP },
1048 .type = ARM_CP_NOP },
1077 .type = ARM_CP_NOP | ARM_CP_EL3_NO_EL2_KEEP },
H A Dcpregs.h37 ARM_CP_NOP = 0x0001, enumerator