Searched refs:ARMV7M_EXCP_SECURE (Results 1 – 3 of 3) sorted by relevance
| /openbmc/qemu/target/arm/tcg/ |
| H A D | m_helper.c | 241 exc = ARMV7M_EXCP_SECURE; in v7m_stack_write()
321 exc = ARMV7M_EXCP_SECURE; in v7m_stack_read()
1040 sfrdy = armv7m_nvic_get_ready_status(nvic, ARMV7M_EXCP_SECURE, false); in v7m_update_fpccr()
1277 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); in v7m_push_stack()
1533 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); in do_v7m_exception_exit()
1576 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); in do_v7m_exception_exit()
1655 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); in do_v7m_exception_exit()
1744 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); in do_v7m_exception_exit()
2007 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); in v7m_read_half_insn()
2055 armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_SECURE, false); in v7m_read_sg_stack_word()
[all …]
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| /openbmc/qemu/hw/intc/ |
| H A D | armv7m_nvic.c | 189 case ARMV7M_EXCP_SECURE: in exc_targets_secure()
717 case ARMV7M_EXCP_SECURE: in armv7m_nvic_set_pending_lazyfp()
1164 if (s->vectors[ARMV7M_EXCP_SECURE].active) { in nvic_readl()
1167 if (s->vectors[ARMV7M_EXCP_SECURE].enabled) { in nvic_readl()
1170 if (s->vectors[ARMV7M_EXCP_SECURE].pending) { in nvic_readl()
1734 s->vectors[ARMV7M_EXCP_SECURE].active = (value & (1 << 4)) != 0; in nvic_writel()
1735 s->vectors[ARMV7M_EXCP_SECURE].enabled = (value & (1 << 19)) != 0; in nvic_writel()
1736 s->vectors[ARMV7M_EXCP_SECURE].pending = (value & (1 << 20)) != 0; in nvic_writel()
2191 case ARMV7M_EXCP_SECURE: in shpr_bank()
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| /openbmc/qemu/target/arm/ |
| H A D | cpu.h | 73 #define ARMV7M_EXCP_SECURE 7 macro
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