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Searched refs:ARCH_PERFMON_EVENTSEL_ENABLE (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/tools/testing/selftests/kvm/x86_64/
H A Dpmu_event_filter_test.c22 #define ARCH_PERFMON_EVENTSEL_ENABLE (1ULL << 22) macro
167 wrmsr(MSR_P6_EVNTSEL0, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_guest_code()
169 wrmsr(MSR_P6_EVNTSEL1, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_guest_code()
191 wrmsr(MSR_K7_EVNTSEL0, ARCH_PERFMON_EVENTSEL_ENABLE | in amd_guest_code()
193 wrmsr(MSR_K7_EVNTSEL1, ARCH_PERFMON_EVENTSEL_ENABLE | in amd_guest_code()
525 wrmsr(MSR_P6_EVNTSEL0 + 0, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_masked_events_guest_code()
527 wrmsr(MSR_P6_EVNTSEL0 + 1, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_masked_events_guest_code()
529 wrmsr(MSR_P6_EVNTSEL0 + 2, ARCH_PERFMON_EVENTSEL_ENABLE | in intel_masked_events_guest_code()
546 wrmsr(MSR_K7_EVNTSEL0, ARCH_PERFMON_EVENTSEL_ENABLE | in amd_masked_events_guest_code()
548 wrmsr(MSR_K7_EVNTSEL1, ARCH_PERFMON_EVENTSEL_ENABLE | in amd_masked_events_guest_code()
[all …]
/openbmc/linux/arch/x86/events/intel/
H A Dp6.c144 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE; in p6_pmu_disable_all()
154 val |= ARCH_PERFMON_EVENTSEL_ENABLE; in p6_pmu_enable_all()
H A Dknc.c183 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE; in knc_pmu_disable_event()
194 val |= ARCH_PERFMON_EVENTSEL_ENABLE; in knc_pmu_enable_event()
H A Dcore.c2368 ARCH_PERFMON_EVENTSEL_ENABLE); in intel_pmu_nhm_workaround()
2810 __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE); in intel_pmu_enable_event()
4237 event->hw.config | ARCH_PERFMON_EVENTSEL_ENABLE;
4240 arr[idx].host &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
4242 arr[idx].guest &= ~ARCH_PERFMON_EVENTSEL_ENABLE;
4267 __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE); in icl_get_event_constraints()
/openbmc/linux/arch/x86/kvm/
H A Dpmu.h158 return pmc->eventsel & ARCH_PERFMON_EVENTSEL_ENABLE; in pmc_speculative_in_use()
/openbmc/linux/arch/x86/include/asm/
H A Dperf_event.h31 #define ARCH_PERFMON_EVENTSEL_ENABLE (1ULL << 22) macro
/openbmc/linux/arch/x86/events/
H A Dcore.c269 if (val & ARCH_PERFMON_EVENTSEL_ENABLE) { in check_hw_exists()
691 if (!(val & ARCH_PERFMON_EVENTSEL_ENABLE)) in x86_pmu_disable_all()
693 val &= ~ARCH_PERFMON_EVENTSEL_ENABLE; in x86_pmu_disable_all()
747 __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE); in x86_pmu_enable_all()
1430 ARCH_PERFMON_EVENTSEL_ENABLE); in x86_pmu_enable_event()
/openbmc/linux/arch/x86/events/amd/
H A Dcore.c21 #define AMD_MERGE_EVENT_ENABLE (AMD_MERGE_EVENT | ARCH_PERFMON_EVENTSEL_ENABLE)
764 __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE); in amd_pmu_v2_enable_event()
H A Duncore.c109 wrmsrl(hwc->config_base, (hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE)); in amd_uncore_start()
/openbmc/linux/arch/x86/events/zhaoxin/
H A Dcore.c347 __x86_pmu_enable_event(hwc, ARCH_PERFMON_EVENTSEL_ENABLE); in zhaoxin_pmu_enable_event()