Searched refs:ARASAN_NAND_INT_STS_XFR_CMPLT_MASK (Results 1 – 1 of 1) sorted by relevance
102 #define ARASAN_NAND_INT_STS_XFR_CMPLT_MASK 0x04 macro384 reg_val |= ARASAN_NAND_INT_STS_XFR_CMPLT_MASK; in arasan_nand_read_page()411 ARASAN_NAND_INT_STS_XFR_CMPLT_MASK) && timeout) { in arasan_nand_read_page()421 writel(reg_val | ARASAN_NAND_INT_STS_XFR_CMPLT_MASK, in arasan_nand_read_page()424 writel(reg_val | ARASAN_NAND_INT_STS_XFR_CMPLT_MASK, in arasan_nand_read_page()553 reg_val |= ARASAN_NAND_INT_STS_XFR_CMPLT_MASK; in arasan_nand_write_page_hwecc()580 ARASAN_NAND_INT_STS_XFR_CMPLT_MASK) && timeout) { in arasan_nand_write_page_hwecc()590 writel(reg_val | ARASAN_NAND_INT_STS_XFR_CMPLT_MASK, in arasan_nand_write_page_hwecc()593 writel(reg_val | ARASAN_NAND_INT_STS_XFR_CMPLT_MASK, in arasan_nand_write_page_hwecc()628 writel(ARASAN_NAND_INT_STS_XFR_CMPLT_MASK, in arasan_nand_reset()[all …]