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Searched refs:AMDGPU_RING_PRIO_DEFAULT (Results 1 – 25 of 38) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ring_mux.c37 { AMDGPU_RING_PRIO_DEFAULT, "gfx_low"},
88 if (mux->ring_entry[i].ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT) { in amdgpu_mux_resubmit_chunks()
220 if (ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT) in amdgpu_ring_mux_set_wptr()
231 if (ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT && mux->pending_trailing_fence_signaled) { in amdgpu_ring_mux_set_wptr()
238 if (ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT && e->sw_cptr < mux->wptr_resubmit) in amdgpu_ring_mux_set_wptr()
244 if (ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT || mux->wptr_resubmit < wptr) { in amdgpu_ring_mux_set_wptr()
359 sw_ring_info[idx].hw_pio : AMDGPU_RING_PRIO_DEFAULT; in amdgpu_sw_ring_priority()
371 if (ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT && in amdgpu_mcbp_scan()
374 if (ring->hw_prio <= AMDGPU_RING_PRIO_DEFAULT && in amdgpu_mcbp_scan()
400 if (adev->gfx.mcbp && ring->hw_prio > AMDGPU_RING_PRIO_DEFAULT) { in amdgpu_sw_ring_ib_begin()
[all …]
H A Damdgpu_ctx.c157 hw_prio = AMDGPU_RING_PRIO_DEFAULT; in amdgpu_ctx_get_hw_prio()
163 hw_prio = AMDGPU_RING_PRIO_DEFAULT; in amdgpu_ctx_get_hw_prio()
H A Djpeg_v3_0.c108 AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v3_0_sw_init()
H A Dmes_v10_1.c856 AMDGPU_RING_PRIO_DEFAULT, NULL); in mes_v10_1_ring_init()
881 AMDGPU_RING_PRIO_DEFAULT, NULL); in mes_v10_1_kiq_ring_init()
H A Duvd_v3_1.c565 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v3_1_sw_init()
H A Duvd_v4_2.c122 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v4_2_sw_init()
H A Damdgpu_ring.h51 AMDGPU_RING_PRIO_DEFAULT = 1, enumerator
H A Duvd_v6_0.c415 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v6_0_sw_init()
429 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v6_0_sw_init()
H A Dmes_v11_0.c962 AMDGPU_RING_PRIO_DEFAULT, NULL); in mes_v11_0_ring_init()
987 AMDGPU_RING_PRIO_DEFAULT, NULL); in mes_v11_0_kiq_ring_init()
H A Djpeg_v1_0.c499 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v1_0_sw_init()
H A Djpeg_v2_5.c138 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v2_5_sw_init()
H A Djpeg_v2_0.c93 0, AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v2_0_sw_init()
H A Duvd_v5_0.c120 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v5_0_sw_init()
H A Djpeg_v4_0.c116 AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v4_0_sw_init()
H A Dsi_dma.c506 AMDGPU_RING_PRIO_DEFAULT, NULL); in si_dma_sw_init()
H A Duvd_v7_0.c451 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v7_0_sw_init()
473 AMDGPU_RING_PRIO_DEFAULT, NULL); in uvd_v7_0_sw_init()
H A Dsdma_v4_4_2.c1359 AMDGPU_RING_PRIO_DEFAULT, NULL); in sdma_v4_4_2_sw_init()
1380 AMDGPU_RING_PRIO_DEFAULT, NULL); in sdma_v4_4_2_sw_init()
H A Dsdma_v2_4.c868 AMDGPU_RING_PRIO_DEFAULT, NULL); in sdma_v2_4_sw_init()
H A Dsdma_v4_0.c1834 AMDGPU_RING_PRIO_DEFAULT, NULL); in sdma_v4_0_sw_init()
1868 AMDGPU_RING_PRIO_DEFAULT, NULL); in sdma_v4_0_sw_init()
H A Dvcn_v3_0.c195 AMDGPU_RING_PRIO_DEFAULT, in vcn_v3_0_sw_init()
1778 [AMDGPU_RING_PRIO_DEFAULT].sched; in vcn_v3_0_limit_sched()
H A Dcik_sdma.c977 AMDGPU_RING_PRIO_DEFAULT, NULL); in cik_sdma_sw_init()
H A Djpeg_v4_0_3.c131 AMDGPU_RING_PRIO_DEFAULT, NULL); in jpeg_v4_0_3_sw_init()
H A Dsdma_v3_0.c1152 AMDGPU_RING_PRIO_DEFAULT, NULL); in sdma_v3_0_sw_init()
H A Damdgpu_gfx.c333 AMDGPU_RING_PRIO_DEFAULT, NULL); in amdgpu_gfx_kiq_init_ring()
H A Damdgpu_mes.c1055 AMDGPU_RING_PRIO_DEFAULT, NULL); in amdgpu_mes_add_ring()

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