Searched refs:AK4375_0F_PLL_REF_CLK_DIVIDER1 (Results 1 – 1 of 1) sorted by relevance
65 #define AK4375_0F_PLL_REF_CLK_DIVIDER1 0x0f /* Reference clock divider [15:8] bits */ macro345 snd_soc_component_write(component, AK4375_0F_PLL_REF_CLK_DIVIDER1, in ak4375_dai_set_pll()