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Searched refs:AHB_RESET_OFFSET_MCTL (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/arch/arm/mach-sunxi/
H A Ddram_sun8i_a83t.c398 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
410 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
H A Ddram_sun9i.c273 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
280 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
H A Ddram_sunxi_dw.c374 clrbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
402 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
H A Ddram_sun8i_a33.c314 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
H A Ddram_sun8i_a23.c68 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
H A Ddram_sun6i.c45 setbits_le32(&ccm->ahb_reset0_cfg, 1 << AHB_RESET_OFFSET_MCTL); in mctl_sys_init()
/openbmc/u-boot/arch/arm/include/asm/arch-sunxi/
H A Dclock_sun9i.h205 #define AHB_RESET_OFFSET_MCTL 14 macro
H A Dclock_sun8i_a83t.h272 #define AHB_RESET_OFFSET_MCTL 14 macro
H A Dclock_sun6i.h462 #define AHB_RESET_OFFSET_MCTL 14 macro