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Searched refs:AD1D0SR (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/arch/arm/mach-pxa/
H A Dpxa3xx-regs.h49 #define AD1D0SR __REG(0x40f40024) /* Application Subsystem Wake-Up from D1 to D0 Status */ macro
/openbmc/u-boot/arch/arm/include/asm/arch-pxa/
H A Dpxa-regs.h1909 #define AD1D0SR 0x40F40024 /* Application Subsystem D1 to D0 state Wakeup Status Register */ macro