xref: /openbmc/linux/arch/sparc/include/asm/visasm.h (revision 498495dba268b20e8eadd7fe93c140c68b6cc9d2)
1  /* SPDX-License-Identifier: GPL-2.0 */
2  #ifndef _SPARC64_VISASM_H
3  #define _SPARC64_VISASM_H
4  
5  /* visasm.h:  FPU saving macros for VIS routines
6   *
7   * Copyright (C) 1998 Jakub Jelinek (jj@ultra.linux.cz)
8   */
9  
10  #include <asm/pstate.h>
11  #include <asm/ptrace.h>
12  
13  /* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc */
14  
15  #define VISEntry					\
16  	rd		%fprs, %o5;			\
17  	andcc		%o5, (FPRS_FEF|FPRS_DU), %g0;	\
18  	be,pt		%icc, 297f;			\
19  	 sethi		%hi(297f), %g7;			\
20  	sethi		%hi(VISenter), %g1;		\
21  	jmpl		%g1 + %lo(VISenter), %g0;	\
22  	 or		%g7, %lo(297f), %g7;		\
23  297:	wr		%g0, FPRS_FEF, %fprs;		\
24  
25  #define VISExit						\
26  	wr		%g0, 0, %fprs;
27  
28  /* Clobbers %o5, %g1, %g2, %g3, %g7, %icc, %xcc.
29   * Must preserve %o5 between VISEntryHalf and VISExitHalf */
30  
31  #define VISEntryHalf					\
32  	VISEntry
33  
34  #define VISExitHalf					\
35  	VISExit
36  
37  #define VISEntryHalfFast(fail_label)			\
38  	rd		%fprs, %o5;			\
39  	andcc		%o5, FPRS_FEF, %g0;		\
40  	be,pt		%icc, 297f;			\
41  	 nop;						\
42  	ba,a,pt		%xcc, fail_label;		\
43  297:	wr		%o5, FPRS_FEF, %fprs;
44  
45  #define VISExitHalfFast					\
46  	wr		%o5, 0, %fprs;
47  
48  #ifndef __ASSEMBLY__
save_and_clear_fpu(void)49  static inline void save_and_clear_fpu(void) {
50  	__asm__ __volatile__ (
51  "		rd %%fprs, %%o5\n"
52  "		andcc %%o5, %0, %%g0\n"
53  "		be,pt %%icc, 299f\n"
54  "		 sethi %%hi(298f), %%g7\n"
55  "		sethi %%hi(VISenter), %%g1\n"
56  "		jmpl %%g1 + %%lo(VISenter), %%g0\n"
57  "		 or %%g7, %%lo(298f), %%g7\n"
58  "	298:	wr %%g0, 0, %%fprs\n"
59  "	299:\n"
60  "		" : : "i" (FPRS_FEF|FPRS_DU) :
61  		"o5", "g1", "g2", "g3", "g7", "cc");
62  }
63  
64  int vis_emul(struct pt_regs *, unsigned int);
65  #endif
66  
67  #endif /* _SPARC64_ASI_H */
68