1 /* 2 * Internal execution defines for qemu (target specific) 3 * 4 * Copyright (c) 2003 Fabrice Bellard 5 * 6 * SPDX-License-Identifier: LGPL-2.1-or-later 7 */ 8 9 #ifndef ACCEL_TCG_INTERNAL_TARGET_H 10 #define ACCEL_TCG_INTERNAL_TARGET_H 11 12 #include "exec/exec-all.h" 13 #include "exec/translation-block.h" 14 #include "tb-internal.h" 15 #include "tcg-target-mo.h" 16 17 /* 18 * Access to the various translations structures need to be serialised 19 * via locks for consistency. In user-mode emulation access to the 20 * memory related structures are protected with mmap_lock. 21 * In !user-mode we use per-page locks. 22 */ 23 #ifdef CONFIG_USER_ONLY 24 #define assert_memory_lock() tcg_debug_assert(have_mmap_lock()) 25 #else 26 #define assert_memory_lock() 27 #endif 28 29 #if defined(CONFIG_SOFTMMU) && defined(CONFIG_DEBUG_TCG) 30 void assert_no_pages_locked(void); 31 #else assert_no_pages_locked(void)32static inline void assert_no_pages_locked(void) { } 33 #endif 34 35 #ifdef CONFIG_USER_ONLY page_table_config_init(void)36static inline void page_table_config_init(void) { } 37 #else 38 void page_table_config_init(void); 39 #endif 40 41 #ifndef CONFIG_USER_ONLY 42 G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr); 43 #endif /* CONFIG_USER_ONLY */ 44 45 /** 46 * tcg_req_mo: 47 * @type: TCGBar 48 * 49 * Filter @type to the barrier that is required for the guest 50 * memory ordering vs the host memory ordering. A non-zero 51 * result indicates that some barrier is required. 52 * 53 * If TCG_GUEST_DEFAULT_MO is not defined, assume that the 54 * guest requires strict ordering. 55 * 56 * This is a macro so that it's constant even without optimization. 57 */ 58 #ifdef TCG_GUEST_DEFAULT_MO 59 # define tcg_req_mo(type) \ 60 ((type) & TCG_GUEST_DEFAULT_MO & ~TCG_TARGET_DEFAULT_MO) 61 #else 62 # define tcg_req_mo(type) ((type) & ~TCG_TARGET_DEFAULT_MO) 63 #endif 64 65 /** 66 * cpu_req_mo: 67 * @type: TCGBar 68 * 69 * If tcg_req_mo indicates a barrier for @type is required 70 * for the guest memory model, issue a host memory barrier. 71 */ 72 #define cpu_req_mo(type) \ 73 do { \ 74 if (tcg_req_mo(type)) { \ 75 smp_mb(); \ 76 } \ 77 } while (0) 78 79 #endif /* ACCEL_TCG_INTERNAL_H */ 80