Searched hist:fcecdcd388ea6725ceb66bb3c71f947f98f50966 (Results 1 – 4 of 4) sorted by relevance
/openbmc/linux/arch/mips/include/asm/mach-loongson64/ |
H A D | builtin_dtbs.h | fcecdcd388ea6725ceb66bb3c71f947f98f50966 Tue Mar 24 22:55:03 CDT 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> MIPS: Loongson64: Load built-in dtbs
Load proper dtb according to firmware passed parameters and CPU PRID.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Co-developed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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H A D | loongson.h | diff fcecdcd388ea6725ceb66bb3c71f947f98f50966 Tue Mar 24 22:55:03 CDT 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> MIPS: Loongson64: Load built-in dtbs
Load proper dtb according to firmware passed parameters and CPU PRID.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Co-developed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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/openbmc/linux/arch/mips/loongson64/ |
H A D | setup.c | diff fcecdcd388ea6725ceb66bb3c71f947f98f50966 Tue Mar 24 22:55:03 CDT 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> MIPS: Loongson64: Load built-in dtbs
Load proper dtb according to firmware passed parameters and CPU PRID.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Co-developed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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H A D | env.c | diff fcecdcd388ea6725ceb66bb3c71f947f98f50966 Tue Mar 24 22:55:03 CDT 2020 Jiaxun Yang <jiaxun.yang@flygoat.com> MIPS: Loongson64: Load built-in dtbs
Load proper dtb according to firmware passed parameters and CPU PRID.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Co-developed-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Huacai Chen <chenhc@lemote.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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