Searched hist:fcb89863d1b798565db6bdaf8f97f65823c2fd1b (Results 1 – 2 of 2) sorted by relevance
/openbmc/linux/arch/riscv/include/asm/ |
H A D | assembler.h | fcb89863d1b798565db6bdaf8f97f65823c2fd1b Thu Mar 30 01:43:19 CDT 2023 Sia Jee Heng <jeeheng.sia@starfivetech.com> RISC-V: Factor out common code of __cpu_resume_enter()
The cpu_resume() function is very similar for the suspend to disk and suspend to ram cases. Factor out the common code into suspend_restore_csrs macro and suspend_restore_regs macro.
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230330064321.1008373-3-jeeheng.sia@starfivetech.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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/openbmc/linux/arch/riscv/kernel/ |
H A D | suspend_entry.S | diff fcb89863d1b798565db6bdaf8f97f65823c2fd1b Thu Mar 30 01:43:19 CDT 2023 Sia Jee Heng <jeeheng.sia@starfivetech.com> RISC-V: Factor out common code of __cpu_resume_enter()
The cpu_resume() function is very similar for the suspend to disk and suspend to ram cases. Factor out the common code into suspend_restore_csrs macro and suspend_restore_regs macro.
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Link: https://lore.kernel.org/r/20230330064321.1008373-3-jeeheng.sia@starfivetech.com Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
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