Searched hist:f6f72338d80ec6f15a6b18643797bc10901aadf3 (Results 1 – 4 of 4) sorted by relevance
| /openbmc/qemu/disas/ |
| H A D | riscv-xventana.h | f6f72338d80ec6f15a6b18643797bc10901aadf3 Mon Jun 12 06:10:33 CDT 2023 Christoph Müllner <christoph.muellner@vrull.eu> disas/riscv: Add support for XVentanaCondOps
This patch adds XVentanaCondOps support to the RISC-V disassembler.
Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230612111034.3955227-8-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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| H A D | riscv-xventana.c | f6f72338d80ec6f15a6b18643797bc10901aadf3 Mon Jun 12 06:10:33 CDT 2023 Christoph Müllner <christoph.muellner@vrull.eu> disas/riscv: Add support for XVentanaCondOps
This patch adds XVentanaCondOps support to the RISC-V disassembler.
Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230612111034.3955227-8-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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| H A D | meson.build | diff f6f72338d80ec6f15a6b18643797bc10901aadf3 Mon Jun 12 06:10:33 CDT 2023 Christoph Müllner <christoph.muellner@vrull.eu> disas/riscv: Add support for XVentanaCondOps
This patch adds XVentanaCondOps support to the RISC-V disassembler.
Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230612111034.3955227-8-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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| H A D | riscv.c | diff f6f72338d80ec6f15a6b18643797bc10901aadf3 Mon Jun 12 06:10:33 CDT 2023 Christoph Müllner <christoph.muellner@vrull.eu> disas/riscv: Add support for XVentanaCondOps
This patch adds XVentanaCondOps support to the RISC-V disassembler.
Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Message-Id: <20230612111034.3955227-8-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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