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H A Dskl.hdiff f2a167ca681d21aa46f127032cc005879c328823 Tue Jul 23 09:58:50 CDT 2019 Cezary Rojewski <cezary.rojewski@intel.com> ASoC: Intel: Skylake: Remove MCPS available check

The entire logic for MCPS calculation and DSP scheduling is found
within DSP firmware. Currently driver implements simplistic, inaccurate
logic itself which may prevent pipeline creation despite firmware being
completely fine its parameters.

Remove that logic and leave the MCPS calculation to DSP alone.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20190723145854.8527-4-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>
H A Dskl-topology.cdiff f2a167ca681d21aa46f127032cc005879c328823 Tue Jul 23 09:58:50 CDT 2019 Cezary Rojewski <cezary.rojewski@intel.com> ASoC: Intel: Skylake: Remove MCPS available check

The entire logic for MCPS calculation and DSP scheduling is found
within DSP firmware. Currently driver implements simplistic, inaccurate
logic itself which may prevent pipeline creation despite firmware being
completely fine its parameters.

Remove that logic and leave the MCPS calculation to DSP alone.

Signed-off-by: Cezary Rojewski <cezary.rojewski@intel.com>
Link: https://lore.kernel.org/r/20190723145854.8527-4-cezary.rojewski@intel.com
Signed-off-by: Mark Brown <broonie@kernel.org>