Searched hist:f1be36969de2fb9b6b64397db1098f115210fcd9 (Results 1 – 1 of 1) sorted by relevance
| /openbmc/qemu/accel/tcg/ |
| H A D | cputlb.c | diff f1be36969de2fb9b6b64397db1098f115210fcd9 Thu Apr 25 16:16:34 CDT 2019 Richard Henderson <richard.henderson@linaro.org> cputlb: Move TLB_RECHECK handling into load/store_helper
Having this in io_readx/io_writex meant that we forgot to
re-compute index after tlb_fill. It also means we can use
the normal aligned memory load path. It also fixes a bug
in that we had cached a use of index across a tlb_fill.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
|