Searched hist:eb6b458cef28c86603d56a27b9ee699b13c60c14 (Results 1 – 6 of 6) sorted by relevance
/openbmc/u-boot/board/freescale/c29xpcie/ |
H A D | spl_minimal.c | eb6b458cef28c86603d56a27b9ee699b13c60c14 Thu Jan 09 20:10:59 CST 2014 Po Liu <po.liu@freescale.com> powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL
Using the TPL/SPL method to booting from 8k page NAND flash. - Add 256kB size SRAM tlb for second step booting; - Add spl.c for TPL image boot; - Add spl_minimal.c for minimal SPL image; - Add C29XPCIE_NAND configure; - Modify C29XPCIE.h for nand config and enviroment;
Signed-off-by: Po Liu <Po.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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H A D | cpld.c | diff eb6b458cef28c86603d56a27b9ee699b13c60c14 Thu Jan 09 20:10:59 CST 2014 Po Liu <po.liu@freescale.com> powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL
Using the TPL/SPL method to booting from 8k page NAND flash. - Add 256kB size SRAM tlb for second step booting; - Add spl.c for TPL image boot; - Add spl_minimal.c for minimal SPL image; - Add C29XPCIE_NAND configure; - Modify C29XPCIE.h for nand config and enviroment;
Signed-off-by: Po Liu <Po.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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H A D | Makefile | diff eb6b458cef28c86603d56a27b9ee699b13c60c14 Thu Jan 09 20:10:59 CST 2014 Po Liu <po.liu@freescale.com> powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL
Using the TPL/SPL method to booting from 8k page NAND flash. - Add 256kB size SRAM tlb for second step booting; - Add spl.c for TPL image boot; - Add spl_minimal.c for minimal SPL image; - Add C29XPCIE_NAND configure; - Modify C29XPCIE.h for nand config and enviroment;
Signed-off-by: Po Liu <Po.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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H A D | tlb.c | diff eb6b458cef28c86603d56a27b9ee699b13c60c14 Thu Jan 09 20:10:59 CST 2014 Po Liu <po.liu@freescale.com> powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL
Using the TPL/SPL method to booting from 8k page NAND flash. - Add 256kB size SRAM tlb for second step booting; - Add spl.c for TPL image boot; - Add spl_minimal.c for minimal SPL image; - Add C29XPCIE_NAND configure; - Modify C29XPCIE.h for nand config and enviroment;
Signed-off-by: Po Liu <Po.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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H A D | spl.c | eb6b458cef28c86603d56a27b9ee699b13c60c14 Thu Jan 09 20:10:59 CST 2014 Po Liu <po.liu@freescale.com> powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL
Using the TPL/SPL method to booting from 8k page NAND flash. - Add 256kB size SRAM tlb for second step booting; - Add spl.c for TPL image boot; - Add spl_minimal.c for minimal SPL image; - Add C29XPCIE_NAND configure; - Modify C29XPCIE.h for nand config and enviroment;
Signed-off-by: Po Liu <Po.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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/openbmc/u-boot/include/configs/ |
H A D | C29XPCIE.h | diff eb6b458cef28c86603d56a27b9ee699b13c60c14 Thu Jan 09 20:10:59 CST 2014 Po Liu <po.liu@freescale.com> powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPL
Using the TPL/SPL method to booting from 8k page NAND flash. - Add 256kB size SRAM tlb for second step booting; - Add spl.c for TPL image boot; - Add spl_minimal.c for minimal SPL image; - Add C29XPCIE_NAND configure; - Modify C29XPCIE.h for nand config and enviroment;
Signed-off-by: Po Liu <Po.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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