Searched hist:eb637edb1241aff1442579475da303ee5b672910 (Results 1 – 2 of 2) sorted by relevance
/openbmc/qemu/include/hw/riscv/ |
H A D | sifive_e.h | eb637edb1241aff1442579475da303ee5b672910 Fri Mar 02 06:31:14 CST 2018 Michael Clark <mjc@sifive.com> SiFive Freedom E Series RISC-V Machine
This provides a RISC-V Board compatible with the the SiFive Freedom E SDK. The following machine is implemented:
- 'sifive_e'; CLINT, PLIC, UART, AON, GPIO, QSPI, PWM
Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>
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/openbmc/qemu/hw/riscv/ |
H A D | sifive_e.c | eb637edb1241aff1442579475da303ee5b672910 Fri Mar 02 06:31:14 CST 2018 Michael Clark <mjc@sifive.com> SiFive Freedom E Series RISC-V Machine
This provides a RISC-V Board compatible with the the SiFive Freedom E SDK. The following machine is implemented:
- 'sifive_e'; CLINT, PLIC, UART, AON, GPIO, QSPI, PWM
Acked-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Sagar Karandikar <sagark@eecs.berkeley.edu> Signed-off-by: Palmer Dabbelt <palmer@sifive.com> Signed-off-by: Michael Clark <mjc@sifive.com>
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