Searched hist:eaacf07d1116f6bf3b93b265515fccf2301097f2 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/x86/events/ |
| H A D | perf_event.h | diff eaacf07d1116f6bf3b93b265515fccf2301097f2 Mon Apr 12 09:30:47 CDT 2021 Kan Liang <kan.liang@linux.intel.com> perf/x86: Hybrid PMU support for unconstrained
The unconstrained value depends on the number of GP and fixed counters.
Each hybrid PMU should use its own unconstrained.
Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1618237865-33448-8-git-send-email-kan.liang@linux.intel.com
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| /openbmc/linux/arch/x86/events/intel/ |
| H A D | core.c | diff eaacf07d1116f6bf3b93b265515fccf2301097f2 Mon Apr 12 09:30:47 CDT 2021 Kan Liang <kan.liang@linux.intel.com> perf/x86: Hybrid PMU support for unconstrained
The unconstrained value depends on the number of GP and fixed counters.
Each hybrid PMU should use its own unconstrained.
Suggested-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Kan Liang <kan.liang@linux.intel.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Link: https://lkml.kernel.org/r/1618237865-33448-8-git-send-email-kan.liang@linux.intel.com
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