Home
last modified time | relevance | path

Searched hist:e9d66bdbc5abecaf705bf5a2f4f6279b9e313b0c (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a77995.cdiff e9d66bdbc5abecaf705bf5a2f4f6279b9e313b0c Wed Jun 30 09:50:43 CDT 2021 Geert Uytterhoeven <geert+renesas@glider.be> pinctrl: renesas: r8a77995: Add bias pinconf support

Implement support for pull-up (most pins, excl. DU_DOTCLKIN0) and
pull-down (most pins, excl. JTAG) handling for the R-Car D3 SoC, using
some parts from the common R-Car bias handling, which requires making
rcar_pin_to_bias_reg() public.

R-Car D3 needs special handling for the NFRE# (GP_3_0) and NFWE#
(GP_3_1) pins. Unlike all other pins, they are controlled by different
bits in the LSI pin pull-up/down control register (PUD2) than in the LSI
pin pull-enable register (PUEN2).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/04aad2b0bf82a32fb08e5e21e4ac1fb03452724f.1625064076.git.geert+renesas@glider.be
H A Dsh_pfc.hdiff e9d66bdbc5abecaf705bf5a2f4f6279b9e313b0c Wed Jun 30 09:50:43 CDT 2021 Geert Uytterhoeven <geert+renesas@glider.be> pinctrl: renesas: r8a77995: Add bias pinconf support

Implement support for pull-up (most pins, excl. DU_DOTCLKIN0) and
pull-down (most pins, excl. JTAG) handling for the R-Car D3 SoC, using
some parts from the common R-Car bias handling, which requires making
rcar_pin_to_bias_reg() public.

R-Car D3 needs special handling for the NFRE# (GP_3_0) and NFWE#
(GP_3_1) pins. Unlike all other pins, they are controlled by different
bits in the LSI pin pull-up/down control register (PUD2) than in the LSI
pin pull-enable register (PUEN2).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/04aad2b0bf82a32fb08e5e21e4ac1fb03452724f.1625064076.git.geert+renesas@glider.be
H A Dpinctrl.cdiff e9d66bdbc5abecaf705bf5a2f4f6279b9e313b0c Wed Jun 30 09:50:43 CDT 2021 Geert Uytterhoeven <geert+renesas@glider.be> pinctrl: renesas: r8a77995: Add bias pinconf support

Implement support for pull-up (most pins, excl. DU_DOTCLKIN0) and
pull-down (most pins, excl. JTAG) handling for the R-Car D3 SoC, using
some parts from the common R-Car bias handling, which requires making
rcar_pin_to_bias_reg() public.

R-Car D3 needs special handling for the NFRE# (GP_3_0) and NFWE#
(GP_3_1) pins. Unlike all other pins, they are controlled by different
bits in the LSI pin pull-up/down control register (PUD2) than in the LSI
pin pull-enable register (PUEN2).

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/04aad2b0bf82a32fb08e5e21e4ac1fb03452724f.1625064076.git.geert+renesas@glider.be