Searched hist:e44f9a7744de8e39eda0f544171efc6e4b1ed91c (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/arch/arm/mach-omap2/ |
| H A D | pm44xx.c | diff e44f9a7744de8e39eda0f544171efc6e4b1ed91c Wed Jun 16 11:49:49 CDT 2010 Santosh Shilimkar <santosh.shilimkar@ti.com> ARM: OMAP4: suspend: Add MPUSS power domain RETENTION support
This patch adds MPUSS(MPU Sub System) power domain
CSWR(Close Switch Retention) support to system wide suspend.
For MPUSS power domain to hit retention(CSWR or OSWR), both
CPU0 and CPU1 power domains need to be in OFF or DORMANT state,
since CPU power domain CSWR is not supported by hardware
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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| H A D | omap-mpuss-lowpower.c | diff e44f9a7744de8e39eda0f544171efc6e4b1ed91c Wed Jun 16 11:49:49 CDT 2010 Santosh Shilimkar <santosh.shilimkar@ti.com> ARM: OMAP4: suspend: Add MPUSS power domain RETENTION support
This patch adds MPUSS(MPU Sub System) power domain
CSWR(Close Switch Retention) support to system wide suspend.
For MPUSS power domain to hit retention(CSWR or OSWR), both
CPU0 and CPU1 power domains need to be in OFF or DORMANT state,
since CPU power domain CSWR is not supported by hardware
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Jean Pihet <j-pihet@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Tested-by: Vishwanath BS <vishwanath.bs@ti.com>
Signed-off-by: Kevin Hilman <khilman@ti.com>
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