| /openbmc/linux/drivers/clk/mediatek/ |
| H A D | clk-mt2712-venc.c | e2f744a82d725ab55091cccfb8e527b4220471f0 Sun Oct 22 23:10:34 CDT 2017 weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> clk: mediatek: Add MT2712 clock support
Add MT2712 clock support, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
[sboyd@codeaurora.org: Static on top_clk_data]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | clk-mt2712-vdec.c | e2f744a82d725ab55091cccfb8e527b4220471f0 Sun Oct 22 23:10:34 CDT 2017 weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> clk: mediatek: Add MT2712 clock support
Add MT2712 clock support, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
[sboyd@codeaurora.org: Static on top_clk_data]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | clk-mt2712-jpgdec.c | e2f744a82d725ab55091cccfb8e527b4220471f0 Sun Oct 22 23:10:34 CDT 2017 weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> clk: mediatek: Add MT2712 clock support
Add MT2712 clock support, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
[sboyd@codeaurora.org: Static on top_clk_data]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | clk-mt2712-bdp.c | e2f744a82d725ab55091cccfb8e527b4220471f0 Sun Oct 22 23:10:34 CDT 2017 weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> clk: mediatek: Add MT2712 clock support
Add MT2712 clock support, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
[sboyd@codeaurora.org: Static on top_clk_data]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | clk-mt2712-img.c | e2f744a82d725ab55091cccfb8e527b4220471f0 Sun Oct 22 23:10:34 CDT 2017 weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> clk: mediatek: Add MT2712 clock support
Add MT2712 clock support, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
[sboyd@codeaurora.org: Static on top_clk_data]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | clk-mt2712-mfg.c | e2f744a82d725ab55091cccfb8e527b4220471f0 Sun Oct 22 23:10:34 CDT 2017 weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> clk: mediatek: Add MT2712 clock support
Add MT2712 clock support, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
[sboyd@codeaurora.org: Static on top_clk_data]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | clk-mt2712-mm.c | e2f744a82d725ab55091cccfb8e527b4220471f0 Sun Oct 22 23:10:34 CDT 2017 weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> clk: mediatek: Add MT2712 clock support
Add MT2712 clock support, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
[sboyd@codeaurora.org: Static on top_clk_data]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | clk-mt2712.c | e2f744a82d725ab55091cccfb8e527b4220471f0 Sun Oct 22 23:10:34 CDT 2017 weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> clk: mediatek: Add MT2712 clock support
Add MT2712 clock support, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
[sboyd@codeaurora.org: Static on top_clk_data]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | clk-pll.c | diff e2f744a82d725ab55091cccfb8e527b4220471f0 Sun Oct 22 23:10:34 CDT 2017 weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> clk: mediatek: Add MT2712 clock support
Add MT2712 clock support, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
[sboyd@codeaurora.org: Static on top_clk_data]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | clk-mtk.h | diff e2f744a82d725ab55091cccfb8e527b4220471f0 Sun Oct 22 23:10:34 CDT 2017 weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> clk: mediatek: Add MT2712 clock support
Add MT2712 clock support, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
[sboyd@codeaurora.org: Static on top_clk_data]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | Makefile | diff e2f744a82d725ab55091cccfb8e527b4220471f0 Sun Oct 22 23:10:34 CDT 2017 weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> clk: mediatek: Add MT2712 clock support
Add MT2712 clock support, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
[sboyd@codeaurora.org: Static on top_clk_data]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|
| H A D | Kconfig | diff e2f744a82d725ab55091cccfb8e527b4220471f0 Sun Oct 22 23:10:34 CDT 2017 weiyi.lu@mediatek.com <weiyi.lu@mediatek.com> clk: mediatek: Add MT2712 clock support
Add MT2712 clock support, include topckgen, apmixedsys,
infracfg, pericfg, mcucfg and subsystem clocks.
Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com>
[sboyd@codeaurora.org: Static on top_clk_data]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
|