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Searched hist:dda3b610eee9dcd433627202584ded417327dd51 (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/include/
H A Dfsl_ddr.hdiff dda3b610eee9dcd433627202584ded417327dd51 Mon Dec 08 17:30:55 CST 2014 York Sun <yorksun@freescale.com> arm/ls1021a: Add workaround for DDR erratum A008378

Internal memory controller counters can reach a bad state after
training in DDR4 mode if accumulated ECC or DBI mode is eanbled.

Signed-off-by: York Sun <yorksun@freescale.com>
/openbmc/u-boot/drivers/ddr/fsl/
H A Dfsl_ddr_gen4.cdiff dda3b610eee9dcd433627202584ded417327dd51 Mon Dec 08 17:30:55 CST 2014 York Sun <yorksun@freescale.com> arm/ls1021a: Add workaround for DDR erratum A008378

Internal memory controller counters can reach a bad state after
training in DDR4 mode if accumulated ECC or DBI mode is eanbled.

Signed-off-by: York Sun <yorksun@freescale.com>
/openbmc/u-boot/arch/arm/include/asm/arch-ls102xa/
H A Dconfig.hdiff dda3b610eee9dcd433627202584ded417327dd51 Mon Dec 08 17:30:55 CST 2014 York Sun <yorksun@freescale.com> arm/ls1021a: Add workaround for DDR erratum A008378

Internal memory controller counters can reach a bad state after
training in DDR4 mode if accumulated ECC or DBI mode is eanbled.

Signed-off-by: York Sun <yorksun@freescale.com>