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| H A D | exynos-usi.yaml | diff d56a8e9c7af835a4f3f88b2ae34f4ba6f7085b7c Tue Dec 14 11:09:24 CST 2021 Sam Protsenko <semen.protsenko@linaro.org> dt-bindings: soc: samsung: Fix I2C clocks order in USI binding example
Now that HSI2C binding [1] is converted to dt-schema format, it reveals
incorrect HSI2C clocks order in USI binding example:
.../exynos-usi.example.dt.yaml:
i2c@13820000: clock-names:0: 'hsi2c' was expected
From schema: .../i2c-exynos5.yaml
.../exynos-usi.example.dt.yaml:
i2c@13820000: clock-names:1: 'hsi2c_pclk' was expected
From schema: .../i2c-exynos5.yaml
Change HSI2C clock order in USI binding example to satisfy HSI2C binding
requirements and fix above warnings.
[1] Documentation/devicetree/bindings/i2c/i2c-exynos5.yaml
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Link: https://lore.kernel.org/r/20211214170924.27998-1-semen.protsenko@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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