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H A Dtcg-target.c.incdiff d2f3066eb2af5d6867974493833834e2aaa427f7 Wed Dec 16 02:12:06 CST 2020 Zihao Yu <yuzihao@ict.ac.cn> tcg/riscv: Fix illegal shift instructions

Out-of-range shifts have undefined results, but must not trap.
Mask off immediate shift counts to solve this problem.

This bug can be reproduced by running the following guest instructions:

xor %ecx,%ecx
sar %cl,%eax
cmovne %edi,%eax

After optimization, the tcg opcodes of the sar are

movi_i32 tmp3,$0xffffffffffffffff pref=all
sar_i32 tmp3,eax,tmp3 dead: 2 pref=all
mov_i32 cc_dst,eax sync: 0 dead: 1 pref=0xffc0300
mov_i32 cc_src,tmp3 sync: 0 dead: 0 1 pref=all
movi_i32 cc_op,$0x31 sync: 0 dead: 0 pref=all

The sar_i32 opcode is a shift by -1, which unmasked generates

0x200808d618: fffa5b9b illegal

Signed-off-by: Zihao Yu <yuzihao@ict.ac.cn>
Message-Id: <20201216081206.9628-1-yuzihao@ict.ac.cn>
[rth: Reworded the patch description.]
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>