Searched hist:ce586f3b8d2105657981a1a43107fe7c5374b280 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/hw/i386/ |
| H A D | intel_iommu_internal.h | diff ce586f3b8d2105657981a1a43107fe7c5374b280 Sun Nov 24 18:33:20 CST 2019 Qi, Yadong <yadong.qi@intel.com> intel_iommu: refine SL-PEs reserved fields checking
1. split the resevred fields arrays into two ones,
2. large page only effect for L2(2M) and L3(1G), so
remove checking of L1 and L4 for large page.
Signed-off-by: Zhang, Qi <qi1.zhang@intel.com>
Signed-off-by: Qi, Yadong <yadong.qi@intel.com>
Message-Id: <20191125003321.5669-2-yadong.qi@intel.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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| H A D | intel_iommu.c | diff ce586f3b8d2105657981a1a43107fe7c5374b280 Sun Nov 24 18:33:20 CST 2019 Qi, Yadong <yadong.qi@intel.com> intel_iommu: refine SL-PEs reserved fields checking
1. split the resevred fields arrays into two ones,
2. large page only effect for L2(2M) and L3(1G), so
remove checking of L1 and L4 for large page.
Signed-off-by: Zhang, Qi <qi1.zhang@intel.com>
Signed-off-by: Qi, Yadong <yadong.qi@intel.com>
Message-Id: <20191125003321.5669-2-yadong.qi@intel.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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