Searched hist:ccc97432adf50156da86132ad75e3a99c9c0d3eb (Results 1 – 3 of 3) sorted by relevance
| /openbmc/u-boot/arch/arm/dts/ |
| H A D | socfpga_arria10_socdk_sdmmc.dts | diff ccc97432adf50156da86132ad75e3a99c9c0d3eb Mon Aug 06 15:07:40 CDT 2018 Marek Vasut <marex@denx.de> ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes
Add the pre-reloc DT markers to clock nodes needed in SPL and early
U-Boot stages. This is required to let the Arria10 clock driver start
early and provide clock information for UART and SDMMC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
|
| H A D | socfpga_arria10_socdk.dtsi | diff ccc97432adf50156da86132ad75e3a99c9c0d3eb Mon Aug 06 15:07:40 CDT 2018 Marek Vasut <marex@denx.de> ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes
Add the pre-reloc DT markers to clock nodes needed in SPL and early
U-Boot stages. This is required to let the Arria10 clock driver start
early and provide clock information for UART and SDMMC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
|
| H A D | socfpga_arria10.dtsi | diff ccc97432adf50156da86132ad75e3a99c9c0d3eb Mon Aug 06 15:07:40 CDT 2018 Marek Vasut <marex@denx.de> ARM: dts: socfpga: Add u-boot,dm-pre-reloc to necessary clock nodes
Add the pre-reloc DT markers to clock nodes needed in SPL and early
U-Boot stages. This is required to let the Arria10 clock driver start
early and provide clock information for UART and SDMMC.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <chin.liang.see@intel.com>
Cc: Dinh Nguyen <dinguyen@kernel.org>
Cc: Ley Foon Tan <ley.foon.tan@intel.com>
|