Searched hist:cc974d5cd84ea60a3dad59752aea712f3d47f8ce (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/target/arm/ |
| H A D | cpu.c | diff cc974d5cd84ea60a3dad59752aea712f3d47f8ce Tue Jan 12 04:44:53 CST 2021 Rémi Denis-Courmont <remi.denis.courmont@huawei.com> target/arm: remove redundant tests
In this context, the HCR value is the effective value, and thus is
zero in secure mode. The tests for HCR.{F,I}MO are sufficient.
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210112104511.36576-1-remi.denis.courmont@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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| H A D | helper.c | diff cc974d5cd84ea60a3dad59752aea712f3d47f8ce Tue Jan 12 04:44:53 CST 2021 Rémi Denis-Courmont <remi.denis.courmont@huawei.com> target/arm: remove redundant tests
In this context, the HCR value is the effective value, and thus is
zero in secure mode. The tests for HCR.{F,I}MO are sufficient.
Signed-off-by: Rémi Denis-Courmont <remi.denis.courmont@huawei.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210112104511.36576-1-remi.denis.courmont@huawei.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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