Searched hist:cb93071bb6da21d17dd7d7d414a389b380f959b2 (Results 1 – 3 of 3) sorted by relevance
/openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
H A D | fdt.c | diff cb93071bb6da21d17dd7d7d414a389b380f959b2 Tue Jun 25 13:37:41 CDT 2013 York Sun <yorksun@freescale.com> mpc85xx: Base emulator support
Prepare for emulator support for mpc85xx parts. Disable DDR training and skip wrlvl_cntl_2 and wrlvl_cntl_3 registers. These two registers improve stability but not supported by emulator. Add CONFIG_FSL_TBCLK_EXTRA_DIV for possible adjustment to time base.
Signed-off-by: York Sun <yorksun@freescale.com>
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H A D | cpu_init.c | diff cb93071bb6da21d17dd7d7d414a389b380f959b2 Tue Jun 25 13:37:41 CDT 2013 York Sun <yorksun@freescale.com> mpc85xx: Base emulator support
Prepare for emulator support for mpc85xx parts. Disable DDR training and skip wrlvl_cntl_2 and wrlvl_cntl_3 registers. These two registers improve stability but not supported by emulator. Add CONFIG_FSL_TBCLK_EXTRA_DIV for possible adjustment to time base.
Signed-off-by: York Sun <yorksun@freescale.com>
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/openbmc/u-boot/ |
H A D | README | diff cb93071bb6da21d17dd7d7d414a389b380f959b2 Tue Jun 25 13:37:41 CDT 2013 York Sun <yorksun@freescale.com> mpc85xx: Base emulator support
Prepare for emulator support for mpc85xx parts. Disable DDR training and skip wrlvl_cntl_2 and wrlvl_cntl_3 registers. These two registers improve stability but not supported by emulator. Add CONFIG_FSL_TBCLK_EXTRA_DIV for possible adjustment to time base.
Signed-off-by: York Sun <yorksun@freescale.com>
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