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/openbmc/qemu/include/hw/riscv/
H A Dsifive_e.hdiff c988de4119af0a0ae7983e870babb5f15793590e Fri Jun 14 06:58:41 CDT 2019 Palmer Dabbelt <palmer@sifive.com> RISC-V: Fix a memory leak when realizing a sifive_e

Coverity pointed out a memory leak in riscv_sifive_e_soc_realize(),
where a pair of recently added MemoryRegion instances would not be freed
if there were errors elsewhere in the function. The fix here is to
simply not use dynamic allocation for these instances: there's always
one of each in SiFiveESoCState, so instead we just include them within
the struct.

Fixes: 30efbf330a45 ("SiFive RISC-V GPIO Device")
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
/openbmc/qemu/hw/riscv/
H A Dsifive_e.cdiff c988de4119af0a0ae7983e870babb5f15793590e Fri Jun 14 06:58:41 CDT 2019 Palmer Dabbelt <palmer@sifive.com> RISC-V: Fix a memory leak when realizing a sifive_e

Coverity pointed out a memory leak in riscv_sifive_e_soc_realize(),
where a pair of recently added MemoryRegion instances would not be freed
if there were errors elsewhere in the function. The fix here is to
simply not use dynamic allocation for these instances: there's always
one of each in SiFiveESoCState, so instead we just include them within
the struct.

Fixes: 30efbf330a45 ("SiFive RISC-V GPIO Device")
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>