Searched hist:c7f41e4f53c4763bf1e350723a560dc3bf46e04b (Results 1 – 1 of 1) sorted by relevance
| /openbmc/qemu/target/s390x/ |
| H A D | cpu.h | diff c7f41e4f53c4763bf1e350723a560dc3bf46e04b Mon Aug 07 06:48:20 CDT 2023 Ilya Leoshkevich <iii@linux.ibm.com> target/s390x: Define TARGET_HAS_PRECISE_SMC
PoP (Sequence of Storage References -> Instruction Fetching) says:
... if a store that is conceptually earlier is
made by the same CPU using the same effective
address as that by which the instruction is subse-
quently fetched, the updated information is obtained ...
QEMU already has support for this in the common code; enable it for
s390x.
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Message-Id: <20230807114921.438881-1-iii@linux.ibm.com>
Acked-by: David Hildenbrand <david@redhat.com>
Signed-off-by: Thomas Huth <thuth@redhat.com>
|