Searched hist:c19a8bc5711ec63e905ef91f045a1489f0aa3cb0 (Results 1 – 3 of 3) sorted by relevance
| /openbmc/u-boot/board/freescale/vf610twr/ |
| H A D | vf610twr.c | diff c19a8bc5711ec63e905ef91f045a1489f0aa3cb0 Sat Sep 06 12:47:06 CDT 2014 Anthony Felice <tony.felice@timesys.com> vf610twr: Tune DDR initialization settings
Removed settings in unsupported register fields. They didn’t
do anything, and in most cases, were not documented in the
reference manual.
Changed register settings to comply with JEDEC required values.
Changed timing parameters because they included full clock
periods that were doing nothing.
Signed-off-by: Anthony Felice <tony.felice@timesys.com>
[rebased on v2014.10-rc2]
Signed-off-by: Stefan Agner <stefan@agner.ch>
|
| /openbmc/u-boot/arch/arm/include/asm/arch-vf610/ |
| H A D | iomux-vf610.h | diff c19a8bc5711ec63e905ef91f045a1489f0aa3cb0 Sat Sep 06 12:47:06 CDT 2014 Anthony Felice <tony.felice@timesys.com> vf610twr: Tune DDR initialization settings
Removed settings in unsupported register fields. They didn’t
do anything, and in most cases, were not documented in the
reference manual.
Changed register settings to comply with JEDEC required values.
Changed timing parameters because they included full clock
periods that were doing nothing.
Signed-off-by: Anthony Felice <tony.felice@timesys.com>
[rebased on v2014.10-rc2]
Signed-off-by: Stefan Agner <stefan@agner.ch>
|
| H A D | imx-regs.h | diff c19a8bc5711ec63e905ef91f045a1489f0aa3cb0 Sat Sep 06 12:47:06 CDT 2014 Anthony Felice <tony.felice@timesys.com> vf610twr: Tune DDR initialization settings
Removed settings in unsupported register fields. They didn’t
do anything, and in most cases, were not documented in the
reference manual.
Changed register settings to comply with JEDEC required values.
Changed timing parameters because they included full clock
periods that were doing nothing.
Signed-off-by: Anthony Felice <tony.felice@timesys.com>
[rebased on v2014.10-rc2]
Signed-off-by: Stefan Agner <stefan@agner.ch>
|