Searched hist:bc2e4d2986e9d2b8a99c16eb8222da2a360a581f (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/clk/tegra/ |
| H A D | clk-tegra-periph.c | diff bc2e4d2986e9d2b8a99c16eb8222da2a360a581f Wed Aug 30 05:21:04 CDT 2017 Thierry Reding <treding@nvidia.com> clk: tegra: Fix sor1_out clock implementation
This clock was previously called sor1_src and was modelled as an input
to the sor1 module clock. However, it's really an output clock that can
be fed either from the safe, the sor1_pad_clkout or the sor1 module
clocks. sor1 itself can take input from either of the display PLLs.
The same implementation for the sor1_out clock is used on Tegra186, so
this nicely lines up both SoC generations to deal with this clock in a
uniform way.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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| H A D | clk-tegra210.c | diff bc2e4d2986e9d2b8a99c16eb8222da2a360a581f Wed Aug 30 05:21:04 CDT 2017 Thierry Reding <treding@nvidia.com> clk: tegra: Fix sor1_out clock implementation
This clock was previously called sor1_src and was modelled as an input
to the sor1 module clock. However, it's really an output clock that can
be fed either from the safe, the sor1_pad_clkout or the sor1 module
clocks. sor1 itself can take input from either of the display PLLs.
The same implementation for the sor1_out clock is used on Tegra186, so
this nicely lines up both SoC generations to deal with this clock in a
uniform way.
Signed-off-by: Thierry Reding <treding@nvidia.com>
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