Searched hist:b8db85b5b5c22236d168eb03a67c2641bf7fa651 (Results 1 – 3 of 3) sorted by relevance
/openbmc/linux/arch/mips/include/asm/octeon/ |
H A D | cvmx-asm.h | diff b8db85b5b5c22236d168eb03a67c2641bf7fa651 Thu Oct 07 18:03:42 CDT 2010 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Update L2 Cache code for CN63XX
The CN63XX has a different L2 cache architecture. Update the helper functions to reflect this.
Some joining of split lines was also done to improve readability, as well as reformatting of comments.
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1663/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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H A D | cvmx-l2c.h | diff b8db85b5b5c22236d168eb03a67c2641bf7fa651 Thu Oct 07 18:03:42 CDT 2010 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Update L2 Cache code for CN63XX
The CN63XX has a different L2 cache architecture. Update the helper functions to reflect this.
Some joining of split lines was also done to improve readability, as well as reformatting of comments.
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1663/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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/openbmc/linux/arch/mips/cavium-octeon/executive/ |
H A D | cvmx-l2c.c | diff b8db85b5b5c22236d168eb03a67c2641bf7fa651 Thu Oct 07 18:03:42 CDT 2010 David Daney <ddaney@caviumnetworks.com> MIPS: Octeon: Update L2 Cache code for CN63XX
The CN63XX has a different L2 cache architecture. Update the helper functions to reflect this.
Some joining of split lines was also done to improve readability, as well as reformatting of comments.
Signed-off-by: David Daney <ddaney@caviumnetworks.com> Patchwork: http://patchwork.linux-mips.org/patch/1663/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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