Searched hist:b36a32ead1596929b1fa5436593d49cac20c20e6 (Results 1 – 5 of 5) sorted by relevance
/openbmc/qemu/target/arm/ |
H A D | cpu-qom.h | diff b36a32ead1596929b1fa5436593d49cac20c20e6 Fri Apr 19 08:32:58 CDT 2024 Jinjie Ruan <ruanjinjie@huawei.com> target/arm: Add support for Non-maskable Interrupt
This only implements the external delivery method via the GICv3.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240407081733.3231820-7-ruanjinjie@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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H A D | internals.h | diff b36a32ead1596929b1fa5436593d49cac20c20e6 Fri Apr 19 08:32:58 CDT 2024 Jinjie Ruan <ruanjinjie@huawei.com> target/arm: Add support for Non-maskable Interrupt
This only implements the external delivery method via the GICv3.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240407081733.3231820-7-ruanjinjie@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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H A D | cpu.c | diff b36a32ead1596929b1fa5436593d49cac20c20e6 Fri Apr 19 08:32:58 CDT 2024 Jinjie Ruan <ruanjinjie@huawei.com> target/arm: Add support for Non-maskable Interrupt
This only implements the external delivery method via the GICv3.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240407081733.3231820-7-ruanjinjie@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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H A D | cpu.h | diff b36a32ead1596929b1fa5436593d49cac20c20e6 Fri Apr 19 08:32:58 CDT 2024 Jinjie Ruan <ruanjinjie@huawei.com> target/arm: Add support for Non-maskable Interrupt
This only implements the external delivery method via the GICv3.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240407081733.3231820-7-ruanjinjie@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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H A D | helper.c | diff b36a32ead1596929b1fa5436593d49cac20c20e6 Fri Apr 19 08:32:58 CDT 2024 Jinjie Ruan <ruanjinjie@huawei.com> target/arm: Add support for Non-maskable Interrupt
This only implements the external delivery method via the GICv3.
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20240407081733.3231820-7-ruanjinjie@huawei.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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