Searched hist:a9ac6c37521ff3f81eba7fada8773c362652d75f (Results 1 – 3 of 3) sorted by relevance
| /openbmc/linux/arch/riscv/kvm/ |
| H A D | vcpu_pmu.c | diff a9ac6c37521ff3f81eba7fada8773c362652d75f Tue Feb 07 03:55:26 CST 2023 Atish Patra <atishp@rivosinc.com> RISC-V: KVM: Implement trap & emulate for hpmcounters
As the KVM guests only see the virtual PMU counters, all hpmcounter
access should trap and KVM emulates the read access on behalf of guests.
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
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| H A D | vcpu_insn.c | diff a9ac6c37521ff3f81eba7fada8773c362652d75f Tue Feb 07 03:55:26 CST 2023 Atish Patra <atishp@rivosinc.com> RISC-V: KVM: Implement trap & emulate for hpmcounters
As the KVM guests only see the virtual PMU counters, all hpmcounter
access should trap and KVM emulates the read access on behalf of guests.
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
|
| /openbmc/linux/arch/riscv/include/asm/ |
| H A D | kvm_vcpu_pmu.h | diff a9ac6c37521ff3f81eba7fada8773c362652d75f Tue Feb 07 03:55:26 CST 2023 Atish Patra <atishp@rivosinc.com> RISC-V: KVM: Implement trap & emulate for hpmcounters
As the KVM guests only see the virtual PMU counters, all hpmcounter
access should trap and KVM emulates the read access on behalf of guests.
Reviewed-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Signed-off-by: Anup Patel <anup@brainfault.org>
|