Searched hist:a859602c746baf4892cc8ca1ce003e92411d1716 (Results 1 – 3 of 3) sorted by relevance
| /openbmc/qemu/target/sparc/ |
| H A D | vis_helper.c | diff a859602c746baf4892cc8ca1ce003e92411d1716 Thu May 02 11:55:25 CDT 2024 Richard Henderson <richard.henderson@linaro.org> target/sparc: Fix FMUL8x16A{U,L}
These instructions have f32 inputs, which changes the decode
of the register numbers. While we're fixing things, use a
common helper for both insns, extracting the 16-bit scalar
in tcg beforehand.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240502165528.244004-5-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
|
| H A D | helper.h | diff a859602c746baf4892cc8ca1ce003e92411d1716 Thu May 02 11:55:25 CDT 2024 Richard Henderson <richard.henderson@linaro.org> target/sparc: Fix FMUL8x16A{U,L}
These instructions have f32 inputs, which changes the decode
of the register numbers. While we're fixing things, use a
common helper for both insns, extracting the 16-bit scalar
in tcg beforehand.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240502165528.244004-5-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
|
| H A D | translate.c | diff a859602c746baf4892cc8ca1ce003e92411d1716 Thu May 02 11:55:25 CDT 2024 Richard Henderson <richard.henderson@linaro.org> target/sparc: Fix FMUL8x16A{U,L}
These instructions have f32 inputs, which changes the decode
of the register numbers. While we're fixing things, use a
common helper for both insns, extracting the 16-bit scalar
in tcg beforehand.
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240502165528.244004-5-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
|